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【Intel】Yield Integrator

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发表于 2017-4-8 11:34:51 | 显示全部楼层 |阅读模式
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Location: Chengdu7 s0 H; }- d" t1 ^/ `5 L
Contact: saw.yen.yew@intel.com
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5 V/ y. _- P# O) C8 Q/ ^Description+ P/ ]. A0 o9 q
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.3 D9 ]$ Z* t0 L3 s* ~% y+ V# i
Your responsibilities will include but not be limited to + s4 p- `: `7 F$ O' _
-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap. 2 P6 j- J8 V: \; W6 J! ~0 y
-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss ; G, A* u- l5 \
-Actively engage excursion management
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8 s7 x) Q* a0 z& z5 r' ^Qualifications
; X1 j, Y- ~: B: [( |- A* F4 BYou must possess a Master or Bachelor degree in engineering background; Additional qualifications include: 1 `/ b$ I" T8 O$ h' R
-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools.
! v. H% l4 X$ }-Demonstrated strong problem-solving skills # m3 a- C4 ?' `
-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills
) G. b$ P1 }( p+ U  u9 k7 t-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment
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, I3 Y0 \) B3 \# K8 L3 h( eThis is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.2 R# X  t; S5 \6 g9 g2 T3 l
Please subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com
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