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【Intel Chengdu】Package Failure Analysis Engineer (应届毕业生)

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发表于 2017-6-26 17:13:08 | 显示全部楼层 |阅读模式
【Intel Chengdu】Package Failure Analysis Engineer (应届毕业生)
; j/ o* I( C4 A2 W( \# v& VWork Location: Chengdu
. `' P0 O& ^6 U& z+ O, wEmail: saw.yen.yew@intel.com+ f+ y8 y! \: G
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Job Description:
8 q* ~+ b8 r5 v) N/ I! ?$ g. e6 EResponsible for identifying and researching component failures to improve product yield, quality and/or reliability. Uses multiple types of tools such as Parametric Analyzer, polisher, optical microscope, Scanning Electron Microscope (SEM), etc., to perform Fault Isolation and Failure Analysis. Evaluates the electrical and mechanical characteristics of integrated circuits, components, sub-components and systems to identify the root cause of failure. Analyzes failure reports and recommends corrective action to prevent reoccurrence of problems. May support new product transfer/startup and improvement of the failure analysis process. Strives to proliferate shared learning across sites. Maintain necessary records and reports. Performs other related duties as required or as directed.1 ?# ?$ k6 P* O/ o/ v' i; z
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Qualifications:: r9 F' }% W( \/ j# h2 C/ a
-Bachelor degree or above in Material Science, Physics, Chemistry, Electronics or Electrical Engineering.; d) s4 |* a* S& c! J
-Self-motivated, good communication skills and team spirit' [: h0 T# j6 k4 I3 }# Y% s  ~- ~+ R/ S
-Fluent English, written and verbal: Q2 t5 M& x# |0 v8 N; L0 M
-Familiar with Microsoft office (PPT/Excel/Word)7 C! L5 r( w' ~- M# I
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This is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.! A. L; _6 r, ]5 \" y0 a/ |- d, T, {
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Please subject your email title “Intel- Package FAE_Chengdu_CG” when applying to saw.yen.yew@intel.com
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