Conexant 成都公司实习招聘

zl182005

Conexant  chengdu
公司要招聘如下岗位的实习生
Intern positions:
0 I# V6 S: c& h, M" _
ASIC Design/Verification Intern (Vacancy:3)
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Job Description:
3 Y- I$ C+ ^% u- l- V$ B6 U1. Design/Verification of video surveillance and audio & voice processor with integrated CODEC and amplifier
2. Unit level & system level testbench build up with SystemC or OVM/UVM
3. Bus Functional Models & APIs development
4. Verification of AMBA-based DMA, DDR Memory Subsystem, and peripheral interfaces including PCIe, USB, SPI, BT656/BT1120, I2C, etc.
  L) k1 }- {3 W4 ]+ T5. High-quality verification with Code Coverage analysis and functional coverage analysis
6. Provide support to ATE/DFT and Validation
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Job requirement:
$ o2 d$ D# l% l2 O1. Majoring in Electrical Engineering, microelectronics or image/graphics processing is preferred
2. Master C/C++ coding and verilog coding, systemC and SystemVerilog is preferred
2 x/ Z) ^, m& G/ u3. Strong DSP background is highly desirable
; ~1 o  l; A, K: T# ~) ?( O4. Knowledge of video coding standard including H264 MPEG-4 is preferable.
% s; b/ u) z. A2 }: y. D* t5. Knowledge of RTL design and verification
8 k" b6 E) P3 F6 M6 l/ P8 T0 M9 X6. Knowledge of Perl and Tcl scripting
7. Able to understand Verilog RTL code, debug simulation errors, identify and fix RTL/Environment issues

Job requirement:
1. Majoring in Electrical Engineering, microelectronics or image/graphics processing is preferred
2 R* K% y- @5 c; C- i" W7 |& L2. Master matlab is preferred
1 s+ j# ^. H) i5 Y) m3. Master digital signal process
4. Master Runge-Kutta and math analysis

联系人：
卢先生
- {3 p5 g7 U6 O( e7 k( k5 e请投简历至 邮箱：lush123@sina.com

! d/ ^2 W" x7 @% u& L; x0 A/ P; I) f& T可以2500/月以上

gblwj

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