- UID
- 33999
- 斋米
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- 斋豆
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- 回帖
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- 积分
- 503
- 在线时间
- 小时
- 注册时间
- 2012-9-21
- 最后登录
- 1970-1-1
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Job title : 798200 (XA INT) Post Silicon Validation PCB designer Intern 2 a U$ \/ N2 g: @
Location: Xian
" G2 }$ g- g A1 W7 a8 u+ qPosition : 1 : D3 m2 I( V6 `- \7 J% u
Contact : fong.ling.loo@intel.com 6 ?/ v; G) j' V% j4 S
Please subject your email as ‘Apply for 798200 (XA INT) Post Silicon Validation PCB designer Intern’
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Job Description: ' g8 e! m$ ]) C+ X
-Develop the printed circuit board schematic and layout based on post silicon validation team's feature requirement request
; D* L* u0 e5 M4 D' A4 U* g7 u-Handle the BOM and sourcing of components, contacting vendors to confirm the part numbers
& G; H+ d' D( b-Coordinating PCB production and assembling ' _* z: E R% ?5 O5 O
-Bring up the PCB with post silicon validation team members . G. A: h) ^5 L/ }% m3 k# c
-PCB rework and testing
, N: G L8 f5 F( s% g-For all the described jobs scope, there is internal mentor to monitor on quality and guide on right execution steps. & y4 t, C6 v$ d# e6 T0 M$ b- Y
; E" g' e! q0 q4 l* wJob Qualifications:
+ l; T+ T. r* i-Knowhow of PCB design is required. , Q) r0 f! N" u
-Able to read English specifications. " a6 e' r- [$ \* |
-Existing PCB design experience is a plus. ; J5 b' y4 [/ V; `
-Able to read & write English emails. 3 c' U1 _+ ?% w& V
-Spoken English is a plus.
. X/ r8 p" G7 ?-Willing to learn the embedded hardware and software in a flexible and open working environment. + M2 C' ]# |+ Y5 G! W
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