- UID
- 33999
- 斋米
-
- 斋豆
-
- 回帖
- 0
- 积分
- 503
- 在线时间
- 小时
- 注册时间
- 2012-9-21
- 最后登录
- 1970-1-1
|
Job title : 798200 (XA INT) Post Silicon Validation PCB designer Intern
" i3 ~ B* J" q, VLocation: Xian 3 s7 f7 D9 G) I; M# \
Position : 1
8 T6 _- A+ M9 _0 P3 n1 ~9 zContact : fong.ling.loo@intel.com
( e4 T9 E5 h* e* M$ o5 M/ U2 ZPlease subject your email as ‘Apply for 798200 (XA INT) Post Silicon Validation PCB designer Intern’ 5 _5 v3 I( r( a, D# C" [6 ~
+ I: D" N. \! \ \5 Z1 i) A
Job Description:
3 e& n" V# Q" M-Develop the printed circuit board schematic and layout based on post silicon validation team's feature requirement request % a. r# b$ x* ~$ e! N0 S F% Z
-Handle the BOM and sourcing of components, contacting vendors to confirm the part numbers
$ q$ c. m6 i2 k6 E5 ^ G C-Coordinating PCB production and assembling
+ E( Y5 O. s- @+ M' w-Bring up the PCB with post silicon validation team members / r9 D7 {1 I$ z& a" [- ?
-PCB rework and testing / Q1 ^/ S6 w' @+ m7 X
-For all the described jobs scope, there is internal mentor to monitor on quality and guide on right execution steps. ) P6 B" O/ F: B4 h9 f: Z( U
$ F- V9 A# y4 q* `$ `' @$ rJob Qualifications: 5 j3 N9 [( K: u, U+ {
-Knowhow of PCB design is required. * \2 |. s- V% u# ~, u, p' J
-Able to read English specifications. 8 @2 r1 U9 @3 A: ^$ E! s
-Existing PCB design experience is a plus. 4 E) L! h, ]& N
-Able to read & write English emails. - O' [3 m- H% I7 ^6 t3 k
-Spoken English is a plus. + c/ A8 b+ @) X
-Willing to learn the embedded hardware and software in a flexible and open working environment.
0 K6 u2 f+ U! z, m% r. C |
|