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【Intel】Yield Integrator

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发表于 2017-3-25 21:13:04 | 显示全部楼层 |阅读模式

" a4 G$ |5 w9 D  HLocation: Chengdu* f) i6 x: O; L* t; |
Contact: saw.yen.yew@intel.com
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Description# k6 I2 @+ U( ^' D
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.
+ y# v# _& B  U: j2 M  o3 ZYour responsibilities will include but not be limited to
6 B( Z; i" k2 H6 Q2 E, t-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap. . |4 ?: f) p+ j$ G
-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss % H) X. z' b1 K2 L+ w& `6 }
-Actively engage excursion management
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Qualifications1 }+ j9 y5 w* t! e
You must possess a Master or Bachelor degree in engineering background; Additional qualifications include: 1 |% f' ~2 i! n- Q  J) r6 r
-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools. % L; @( ~; K; I2 W
-Demonstrated strong problem-solving skills 4 t5 F  |' R) B* s# C( c
-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills
1 |- V* o8 }8 P  Z0 S-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment
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* k5 t! o( H( C. j; KThis is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.0 R! R' r3 y* [& ]% F  S
Please subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com! U* k, l8 S' E- y9 R

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