- UID
- 33999
- 斋米
-
- 斋豆
-
- 回帖
- 0
- 积分
- 503
- 在线时间
- 小时
- 注册时间
- 2012-9-21
- 最后登录
- 1970-1-1
|
: Y( l0 o1 _4 |$ r& Y* q
Location: Chengdu( Z2 h6 j4 E3 m6 @
Contact: saw.yen.yew@intel.com, m3 m* C. [ ^: \
9 a( m! c: g# \/ y6 ]3 R
N* l# @ H$ V
Description7 _9 A _2 {+ p
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.. W; F' w0 P- }# R' u* z8 ? @
Your responsibilities will include but not be limited to 3 O! {; r: K+ [, U( t, Y
-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap. 6 `/ P [" M6 p) f& Z) p
-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss
7 C% a' A3 a0 r" F-Actively engage excursion management
2 f% b4 `( n1 N. ?6 n2 B0 f2 N" t: _& X. j' F9 ?$ ]( [( O. A* N
Qualifications
! n7 _; H0 P8 V" t4 K: p0 rYou must possess a Master or Bachelor degree in engineering background; Additional qualifications include: $ t+ W6 }% Y5 P2 r
-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools. : Z( J# q2 E) }$ Y6 b. }8 {
-Demonstrated strong problem-solving skills
) w5 v' ~8 C! J2 t& d! H8 l-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills
3 o0 p. S" T4 w' ~' u" g1 k M-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment - j* S0 a) U: J/ K. v2 T+ V
- H/ g$ r' X I
This is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.3 R& e: O. t5 k* j+ l. {
Please subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com
! a6 x; T4 {4 u* D
* y! Q' w, p( X
: y' O: H; W3 |. H |
|