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【Intel】Yield Integrator

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发表于 2017-4-18 15:08:37 | 显示全部楼层 |阅读模式
Location: Chengdu
' }+ b5 a7 s/ o0 |$ J3 VContact: saw.yen.yew@intel.com
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Description: v* o$ r3 R/ U! f  o1 S9 z# r3 S
Process Yield Integrator is responsible for monitoring whole line Process Induced Yield Loss, finding root cause and navigating process improvement plan.: I# g, Z+ E9 C' b, z0 A$ \% S1 b
Your responsibilities will include but not be limited to * T- S1 x' d! O" W+ m2 B) ?
-Identifying the yield improvement opportunities through Modular Based Problem Solving and managing the yield improvement roadmap. - l) d  U* p/ i) H, Q; N& p6 q
-Working closely with Technology Development Team/Die Prepare manufacturing/Module/Manufacturing/Material to identify and fix the causes of yield loss ' i0 Y; C" F( x) i! Z
-Actively engage excursion management
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+ @) M# s& q' ~- [Qualifications- j. z) L$ ^  a+ c
You must possess a Master or Bachelor degree in engineering background; Additional qualifications include:
+ a" I5 U: E. j+ a8 f2 G3 J) F! k& `  I-A good understanding on Assembly/Test process, PCS, Excursion Management, Data Extraction and Data Analysis Tools.
8 o9 B& Z# S: i& Q" z-Demonstrated strong problem-solving skills
1 q5 n: A/ q+ V1 \-Good analytical capabilities as well as a solid teamwork orientation and outstanding communication skills
  e# U: w$ r/ ~, E: v1 B+ O6 h-Self-motivated, reliable to deliver on time, a quick-thinker, be able to work in a fast-paced work environment
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8 Z% K; v( [: L( SThis is a full time college graduate position. It’s suitable for student who is going graduated in Y16 or Y17.' ~! o1 @% O% a( s3 M
Please subject your email as ‘Yield Integrator_Chengdu’ when applying to saw.yen.yew@intel.com
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